This invention pertains to a detector capable of detecting the existence of an idle state of the microprocessor unit (MPU) for power saving.
Recently various, portable-type communication devices have been commercialized. Such a portable-type communication device is usually battery-driven and therefore lower power dissipation achieves longer battery life and continuous use.
Although reduction in the clock frequency (i.e., the operating frequency of the MPU) produces the advantage that a less amount of power is dissipated, such results in the performance loss. Therefore, low-power communication devices may not be obtained by simply reducing their operating frequency.
Observing a way of how the user actually operates a communication device shows that the MPU is frequently placed in the key-entry wait state or in the mouse-entry wait state. In such a wait state, the MPU just waits for a command to come from the outside, in other words the MPU is in the idle state.
FIG. 9 is a flow diagram showing a sequence of operations of an MPU which is placed in the idle state, more specifically, in a key-entry wait state.
At STEP S1, INSTRUCTION A is read from at ADDRESS #a. At STEP S2, data held by a keyboard input interface is transferred to a register according to INSTRUCTION A. At STEP S3, INSTRUCTION B is read from at ADDRESS #b. At STEP S4, the data of the register is checked as to whether it indicates the presence of a key entry. If STEP S4 says YES, then a process of accepting a following key entry is executed. On the other hand, if STEP S4 says NO, the program returns to STEP S1. In other words, the MPU repeatedly executes a series of steps, namely STEP S1 through STEP S4, until a new key entry is inputted.
As can be seen from FIG. 9, a drop in the operating frequency may not make the operator feel inconvenience. Therefore, the power consumption of communication devices can be reduced by lowering the operating frequency when the MPU is detected to be in the idle state.
FIG. 10 is a conceptual diagram useful in understanding the organization of a prior art idle state detector. 61 is a storage space for use by the MPU. Storage space 61 corresponds to a memory area for storing a program for use in executing operations, to a key entry interface, and to the like element. 62 is a detection element. Each detection element 62 is assigned a respective memory space and sets a flag when an address indicative of the assigned memory space is referred to by the MPU. Storage space 61 is a 1M-word storage space, and a single detection element 62 is provided for every 2K words. Therefore, the number of detection elements 62 is 512.
When the MPU is placed in an idle state and operates according to the flow diagram of FIG. 9, referred-to addresses by the MPU are only those, i.e., ADDRESS #a, ADDRESS #b, and ADDRESS of the key entry interface. At this point in time, only detection elements 62, indicated in FIG. 10 by circles with oblique lines, set respective flags.
NIKKEI ELECTRONICS (No. 585, pp. 171-178, 5 Jul. 1993) reports a technique. In accordance with this technique, flag status information of detection element 62 as to an MPU idle state is prestored in an idle state detecting circuit. The idle state detecting circuit is able to detect the existence of an MPU idle state by watching the flag status of detection element 62.
The prior art idle state detector, however, suffers the following problems. In a conventional idle state detector, a memory space assigned to a single detection element 62 has a specific memory space size, so that it is most likely that the state of the MPU is detected wrongly, in other words, even when the MPU repeatedly performs usual arithmetic operations in a non-idle state, the MPU is misjudged to be in an idle state.
Larger number of detection elements 62 achieves better results of the idle state detection. Theoretically, it is possible to detect an MPU idle state at 100% accuracy if one detection element 62 is provided for every memory space address. This, however, increases the amount of hardware. As a result, more device area is required and more power is consumed. To sum up, in the prior art idle state detector the accuracy of detecting the existence of an idle state and the amount of hardware are in a tradeoff relationship.